Semicon 2.0 Gazette Notification and What It Means For MSMEs

Semicon 2.0 exists because Semicon 1.0 answered some questions and left others open.

The first phase cleared the Cabinet in December 2021 with a ₹76,000 crore purse and one flagship: a $19.5 billion joint venture between Vedanta and Foxconn to build a full semiconductor fab and display plant in Gujarat. In July 2023, Foxconn walked away. Its talks with STMicroelectronics as a technology partner had deadlocked, and the Indian incentive-approval process was slower than the timeline the JV had budgeted for. The Vedanta proposal was later put on the back burner by the government. Semicon 1.0’s flagship never got built.

What did get built came in from the side. Micron applied alone in mid-2023 and broke ground at Sanand for a ₹22,516 crore ATMP plant. Kaynes Semicon and CG Power followed with OSAT approvals in February 2024. Tata Electronics took the Dholera fab slot in the same round, and Tata Semiconductor Assembly and Test took the ATMP slot at Jagiroad, Assam. By the time the Cabinet approved Semicon 2.0 in July 2026, PIB was counting twelve approved projects and roughly ₹1.60 lakh crore in cumulative committed investment, of which three were already in commercial production.

Two things became clearer.

The anchor pattern worked. Big cheques, big companies, big places. Sanand’s 2,200-hectare cluster was the visible result: not one chip factory, but a supplier ecosystem that grew around several. The Design Linked Incentive scheme under Semicon 1.0 also earned real numbers, approving 24 chip-design projects from startups and MSMEs and giving another 105 firms access to industry-standard EDA tools.

The supplier ecosystem was still an afterthought. India was importing almost every semiconductor-grade chemical, specialty gas, wafer, substrate and fab tool the new plants would consume. No scheme instrument sat behind the anchors telling an Indian MSME what to build, what qualification standard to meet, or who would be its guaranteed first customer. On the design side, the DLI cheques were too small and disbursed too slowly to close the patient-capital gap chip founders face, where a first tapeout costs years, not quarters.

Business Standard summed up the reset in one line: Semicon 2.0 “will be totally the reverse of Semicon 1.0”. The first phase went after manufacturing capacity. The second phase is aimed at the ecosystem around it. The budget nearly doubles. One category, Design for the Commercial Sector, is built specifically for startups and MSMEs. Three new pillars cover materials, R&D, and talent development.

Whether that reset is real, and what any of it means for an MSME reading the gazette in Assam or elsewhere, is what the rest of this report checks.

The 31 August gazette is called the Scheme for development of Semiconductor Design and Manufacturing Ecosystem in India (F. No. W-38/6/2025-IPHW). Its own background section notes that Semicon 1.0 “generated significant interest in the semiconductor industry” and “significant demand for upstream products in the semiconductor ecosystem”, which is the gazette-drafting way of saying the first phase’s anchors created a supply gap the second phase now has to fill.

Fiscal support in the notification is organised into six pillars and ten categories:

Applications are open for three years from notification. Projects run up to six years, with a mid-term appraisal in year three of implementation, per Section 9. Three approval tiers apply. Design and Talent proposals under ₹100 crore clear at Secretary level. ₹100 crore to ₹500 crore needs the Minister’s sign-off. Above ₹500 crore, and every category outside Design and Talent regardless of size, goes to the Union Cabinet.

The chart below plots all ten categories on a single horizontal scale (logarithmic, because the range runs from ₹50 crore to ₹20,000 crore). The vertical orange line at ₹125 crore is the Medium-enterprise ceiling that took effect on 1 April 2025. Green is Category 2, the one line with no capital floor. Blue marks the two categories that stay inside the ceiling. Grey is everything past it.

The second chart takes Category 2’s own money trail apart: DIS provides infrastructure access (EDA, MPW, IP cores) with no cash. P-DLI provides milestone-linked seed funding capped at ₹15 crore per application, with equity co-investment beyond that. Category 3’s Deployment-Linked Incentive attaches downstream once a product launches, at 9% of net sales for five years.

For readers who want to click through the same data category by category, the interactive version of both charts sits on its own page.

India revised its MSME classification with effect from 1 April 2025. The investment and turnover limits rose 2.5 times and 2 times respectively: Micro to ₹2.5 crore investment and ₹10 crore turnover, Small to ₹25 crore and ₹100 crore, Medium to ₹125 crore and ₹500 crore.

The ₹125 crore Medium ceiling is the line each Semicon 2.0 category deserves to be checked against.

Two categories do not appear in the table because the notification sets no capital floor for them. Category 1 (strategic-priority design) runs on a C-DAC-issued Request for Proposal, competitively bid. Category 9 (R&D) funds up to 75% of project cost for semiconductor companies alone or in consortium with academic institutions.

Category 3, the Deployment-Linked Incentive, is not a standalone entry point. It opens only to applicants already eligible under Category 1 or 2, at 9% reimbursement on net sales for five years, capped at ₹30 crore per application and ₹120 crore per company.

Category 10 (Talent Development) does not admit companies at all. Eligibility runs to academic institutions, R&D organisations, laboratories and training bodies, funded up to 75% of project cost.

Read the ten together and a pattern falls out. Eight are gated by capital. Six of those eight clear the top of the Medium band, some by two orders of magnitude. India’s revised MSME classification took effect on 1 April 2025; this notification followed on 31 August 2026. Both numbers were drafted inside the same eighteen-month window, at MEITY and the Ministry of MSME. The floors were set knowing where the ceiling now stands.

Category 2, Design of Semiconductor IPs, Chips and SoCs for the Commercial Sector, is the only line in the notification with no capital floor. Two support tracks apply.

Design Infrastructure Support (DIS) is access, not cash. Eligible academic institutions, startups and MSMEs get centralised access to the national EDA Tools Grid and Multi-Project Wafer fabrication services, both normally priced out of reach for a first design house. All eligible applicants, not just MSMEs, also get IP cores, Compute Sub-Systems and post-silicon validation access.

Product Design Linked Incentive (P-DLI) splits by company size. Startups and MSMEs get milestone-linked seed funding of 50% of project cost or ₹15 crore, whichever is lower, per application. Beyond ₹15 crore, equity co-investment applies on whatever terms the company’s existing VC or PE investors already set. Companies outside the startup/MSME band take royalty financing instead: 5% of net product revenue, repaid until 1.5 times the support extended is recovered.

Exit terms are specific. A company that took seed or equity co-investment exits by paying the higher of (the seed funding provided plus current market value of the government’s equity stake) or 1.5 times the total support extended. On royalty financing, exit is 1.5 times the support if the company exits within four years of the last disbursement, or double if it exits after.

Category 3’s Deployment-Linked Incentive attaches downstream. Once a Category 2 product launches, its applicant can also claim 9% reimbursement on net sales for five years, capped at ₹30 crore per application. That is the second cheque, not a separate entry point.

Design is also the one vertical of India’s semiconductor stack that starts from an advantage rather than a gap. Our directory entry on turnkey ASIC design services puts the realistic MSME entry cost at ₹2 to 5 crore before the first tapeout, needing engineers and tool seats rather than a cleanroom. Category 2 is the funding shape built on top of that reality.

The larger MSME opportunity in Semicon 2.0 is not on the applicant list. It is in the procurement pipeline each approval opens for the next fifteen to twenty years.

Every approval under Category 5, 6, 7 or 8 turns into a supplier order book. A ₹1,000 crore ATMP plant does not stamp its own leadframes, spin its own bonding wire, machine its own test jigs, scrub its own exhaust gases, print its own PCBs or supply its own cleanroom garments. It buys those. And most of what it buys falls in the ₹2 to 30 crore per-supplier-per-year band that MSMEs are built for. Sanand is what this pattern looks like once it has run. The 600 MSMEs in that cluster today exist because Micron, Kaynes, CG Power and Tata do.

Our own ten-vertical semiconductor supply chain map itemises 100+ inputs each large plant procures, with the MSME entry capex and time-to-qualify on every one. A concrete example, leadframes: ₹2.5 to 4.5 crore of stamping presses and etching lines, 18-30 months to first shipment and AEC-Q qualification, and roughly 95% import dependency at Sanand today. That is a Tier A opportunity for an MSME that never touches a Semicon 2.0 application form.

The duty structure on those imported inputs is the other lever. Finished ICs enter India duty-free, but the wafers, photoresists and specialty chemicals a Category 5, 6 or 8 plant runs on carry BCD, SWS and IGST unless a project-specific exemption applies. That is a domestic-substitution premium built into the tariff schedule itself, and it is what makes the Category 4(b) Raw Materials floor (₹50 crore, 30% capex support) commercially defensible for a Medium enterprise willing to reach the top of its investment band.

The catch is what the gazette does not do. It sets no domestic-content floor for any anchor’s tenders. A Category 8 applicant can procure entirely offshore and stay compliant with the notification. A-SEMI’s vendor-development track in Assam, and PLI-linked local-content rules in adjacent schemes, remain the only levers pushing domestic sourcing. What Semicon 2.0 creates is the demand; whether an Indian MSME captures it depends on state-level programmes and each anchor’s own supplier posture.

Semicon 2.0 sets no district or state-specific terms anywhere in its text. Every threshold applies identically whether the applicant sites its project in Gujarat, Assam or anywhere else. That is a familiar pattern to readers of our finding on Assam’s own industrial policy: IIPA 2019 sets no zone system either, and rates move with enterprise size, not district.

Assam’s actual semiconductor lever is a state programme, not this one. The A-SEMI programme, ₹1,164 crore over five years, announced in the Assam Budget 2026-27, is JICA-backed and aimed at building a local supplier and skilled-workforce base around Tata’s Jagiroad plant. It runs alongside Semicon 2.0, not inside it.

Jagiroad itself falls under Category 8, ATMP/OSAT, in the new scheme’s structure. But TSAT was approved under the original Semicon India Programme, not under this notification. Category 8’s ₹1,000 crore floor and 35% (advanced) or 25% (legacy) capex support are the terms for the next OSAT investment in Assam, not a retroactive condition on Tata’s plant.

For an Assam-based MSME, the honest map narrows further. Our component-by-component analysis of TSAT’s packaging process put realistic MSME entry costs for the six buildable ancillary components at ₹1.5 to 4.5 crore. The six are leadframes, die-attach adhesives, underfill, plating chemicals, precision engineering, and test sockets. That is well inside the Small-enterprise band, and nowhere close to Category 4’s ₹50 crore floor for raw materials manufacturing.

Read the same six against the demand-shock lens. Every one is a supplier row TSAT already needs, at a capex an Assam MSME can raise. The gap for Assam is not the applicant threshold. It is the qualification cycles, quality-system certifications and the anchor purchase commitment that turns speculative capacity into a Tier-1 supplier relationship. Closing that gap is what A-SEMI’s ₹1,164 crore is meant to do.

None of this is new for Assam. Our OSAT cluster comparison of Penang, Sanand and Morigaon reached the same finding from a different angle: ecosystem depth, not capital access, is what Morigaon is still short of. Kaynes and L&T’s Jagiroad-linked moves remain the demand signal worth tracking.

The scheme’s three-year application window closes on 31 August 2029, with a mid-term appraisal in year three of implementation. If Category 4(b) and 4(c) attract zero MSME-scale direct applicants by then, and if Morigaon does not have a supplier-MSME count comparable to Sanand’s 600 by the same date, those are the two questions the appraisal has to answer.